Field Programmable Counter Arrays Integration with Field Programmable Gates Arrays
Vladimir Karnaushenko, Alexander Borodin
Theoretical and Applied Aspects of Device Development on Microcontrollers and FPGAs, MC&FPGA. – 2019. – P. 14-16.
Field Programmable Counter Arrays (FPCAs) have been recently introduced to close the gap between Field Programmable Gates Arrays (FPGA) and Application Specified Integrated Circuits (ASICs) for arithmetic dominated applications. FPCAs are reconfigurable lattices that can be embedded into FPGAs to efficiently compute the result of multi-operand additions.
Keywords: Field Programmable Counter Arrays, arithmetic applications, integration, shadow cluster
Full Text: PDF
- A.M. Smith, G.A. Constantinides, and P.Y.K. Cheung, “Integrated Floorplanning, Module-Selection, and Architecture Generation for Reconfigurable Devices,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 16, 2008, pp. 733-744.
- S. Wilton, J. Rose, and Z. Vranesic, “The memory/logic interface in FPGAs with large embedded memory arrays,” Very Large Scale Integration (VLSI) Systems, IEEE Transactions on, vol. 7, 1999, pp. 80-91.
- C.W. Yu et al., “The Coarse-Grained / Fine-Grained Logic Interface in FPGAs with Embedded Floating-Point Arithmetic Units,” Programmable Logic, 2008 4th Southern Conference on, 2008, pp. 63-68.
- Peter Jamieson and Jonathan Rose, “Enhancing the area-efficiency of FPGAs with hard circuits using shadow clusters,” Field Programmable Technology, 2006. FPT 2006. IEEE International Conference on, 2006, pp. 1-8
- P. Jamieson and J. Rose, “Architecting Hard Crossbars on FPGAs and Increasing their Area Efficiency with Shadow Clusters,” Field-Programmable Technology, 2007. ICFPT 2007. International Conference on, 2007, pp. 57-64.
- B. Parhami, Computer Arithmetic: Algorithms and Hardware Designs, Oxford University Press, USA, 1999.
- P. Ashenden, “A comparison of recursive and repetitive models of recursive hardware structures, VHDL International Users Forum. Spring Conference, 1994. Proceedings of, 1994, pp. 80-89.
- A. Verma and P. Ienne, “Automatic Synthesis of Compressor Trees: Reevaluating Large Counters,” Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE ’07, 2007, pp. 1-6.